Materiales instruccionales completos sobre lógica booleana, tablas de verdad y puertas lógicas para AP Computer Science Principles con adaptaciones neurodivergentes.
1. Converts human reasoning into mathematically verifiable operations.
2. Enables circuit minimization to save chip area and reduce power draw.
3. Forms the foundation of programmatic flow control across modern languages.
Historical Foundations Page 5
Truth Tables
Verification Instrument
Exhaustive Mapping of Possibilities
A truth table displays every possible permutation of input variables alongside the exact resulting output state.
Row calculation rule:
Total rows = 2n
Where n represents the number of independent input variables.
Combinatorial Expansion
• 1 input: 21 = 2 combinations (true, false).
• 2 inputs: 22 = 4 combinations.
• 3 inputs: 23 = 8 combinations.
• 4 inputs: 24 = 16 combinations.
Ensures that no corner case remains unhandled in the design of the digital system.
Logical Structuring Page 6
Everyday Analogy
House Rules
AND Rule (Conjunction)
“To unlock the front door, you must carry the physical key AND enter the keypad security code.”
Having the key without the code fails. Knowing the code without the key fails. Both criteria must be satisfied at the exact same moment.
OR Rule (Disjunction)
“To receive incoming packages, you can open the main gate OR open the mailbox slot.”
Satisfying either single option is sufficient. If both pathways happen to be available, the operation succeeds just as well.
Concrete Connections Page 7
Basic Operators
NOT Operator
Logical State Inversion
The NOT operator acts on a single Boolean operand and inverts its truth value. If the input is true, the output becomes false; if the input is false, the output becomes true.
Standard syntax across platforms:
• NOT A (AP CSP pseudocode)
• !A (Java, JavaScript, C++)
• not A (Python)
Concrete Code Example
Variable: door_open = false
Expression: NOT door_open
Evaluated result: true (the door is currently closed).
Operator Acquisition Page 8
Truth Table
NOT Operator
Unary Structure
Because NOT evaluates a single variable, exactly two rows are required to map every possible runtime circumstance.
Notice the direct inverse correspondence between the input column and the output state.
Input (A)
Output (NOT A)
false (0)
true (1)
true (1)
false (0)
Analytical Verification Page 9
Circuit Implementation
NOT Gate (Inverter)
Schematic Symbol
In digital circuit schematics, the NOT gate is drawn as a right-pointing triangle with a small inversion bubble attached to its tip.
The triangular body indicates the direction of signal propagation, while the circular bubble formally indicates the mathematical negation.
A Q
Logic equation: Q = NOT A
Hardware Schematics Page 10
Basic Operators
AND Operator
All-Inclusive Requirement
The AND operator evaluates two or more operands and evaluates to true exclusively when every input condition is true. If any single input evaluates to false, the overall result is false.
Standard syntax across platforms:
• A AND B (AP CSP pseudocode)
• A && B (Java, JavaScript, C++)
• A and B (Python)
Multiplication Heuristic
The AND operator behaves identically to standard arithmetic multiplication:
• 0 × 0 = 0 (false)
• 0 × 1 = 0 (false)
• 1 × 0 = 0 (false)
• 1 × 1 = 1 (true)
Operator Acquisition Page 11
Truth Table
AND Operator
Four Evaluation Rows
Two input variables yield four distinct test scenarios. Notice that the output is true in exactly one single row: when both A and B are true.
A single false operand immediately pulls the overall evaluation down to false.
A
B
A AND B
false (0)
false (0)
false (0)
false (0)
true (1)
false (0)
true (1)
false (0)
false (0)
true (1)
true (1)
true (1)
Analytical Verification Page 12
Circuit Implementation
AND Gate
Schematic Symbol
The standard AND gate features a completely flat back edge where the input terminals enter, and a smooth semicircular front arc facing the output terminal.
In transistor technology, an AND gate is built by arranging switches in series: electric current traverses the gate only when both switches are closed simultaneously.
A B Q
Logic equation: Q = A AND B
Hardware Schematics Page 13
Basic Operators
OR Operator
Flexibility of Alternatives
The OR operator evaluates to true if at least one of its operand conditions is true. It evaluates to false exclusively when all inputs are false.
Standard syntax across platforms:
• A OR B (AP CSP pseudocode)
• A || B (Java, JavaScript, C++)
• A or B (Python)
Inclusive Nature of Computing
In everyday speech, people sometimes mean exclusive choice when saying ‘or’ (such as choosing tea or coffee). In computer science, the fundamental OR is inclusive: if both inputs are true, the output is true.
Operator Acquisition Page 14
Truth Table
OR Operator
Predominance of True Outcomes
In the OR truth table, three out of the four possible input combinations produce a positive true outcome.
Detecting a single true signal along any channel is sufficient for the entire gate to activate.
A
B
A OR B
false (0)
false (0)
false (0)
false (0)
true (1)
true (1)
true (1)
false (0)
true (1)
true (1)
true (1)
true (1)
Analytical Verification Page 15
Circuit Implementation
OR Gate
Schematic Symbol
The OR gate symbol is identified by its inwardly curved, concave back edge and pointed forward nose that tapers toward the output line.
In physical hardware, this operation is built by placing transistors in parallel: if either branch conducts, voltage arrives at the output terminal.
A B Q
Logic equation: Q = A OR B
Hardware Schematics Page 16
Core Triad
Morphological Comparison
NOT
Inverts the incoming signal.
1 input, 1 output
AND
Demands both inputs active.
Flat, vertical back
OR
Requires any one input active.
Inward curved back
Visual Synthesis Page 17
AP CSP Standard
Conditional Flow Control
Selection Control Structures
In official AP Computer Science Principles pseudocode, IF (condition) blocks evaluate Boolean expressions to choose whether internal statements execute.
If the expression evaluates to true, the block executes. If false, program execution jumps to the ELSE branch or continues downstream.
// Official AP CSP pseudocode notation
IF (condition_1 AND condition_2)
{
DISPLAY (“Access granted”)
}
ELSE
{
DISPLAY (“Access denied”)
}
Exam Framework Standards Page 18
Step-by-Step Analysis
Code Segmentation
Segment 1: Input Variable Definition
age <-- 17
has_permission <-- true
The program stores initial state variables for a student applying to participate in an advanced computer laboratory activity.
Segment 2: Compound Evaluation
can_participate <-- (age >= 16) AND has_permission
Step A: (17 >= 16) evaluates to true.
Step B: has_permission holds true.
Step C: true AND true produces true.
Procedural Decomposition Page 19
Technical Deep Dive
Short-Circuit Evaluation
Runtime Resource Optimization
Modern language engines implement short-circuit evaluation to eliminate unneeded calculations and avoid fatal runtime errors.
When the first evaluated sub-expression guarantees the final truth value, subsequent conditions are skipped entirely.
Short-Circuit in AND:
If the first operand is false, the whole expression is guaranteed false. The right-hand condition is never evaluated.
Short-Circuit in OR:
If the first operand is true, the whole expression is guaranteed true. The second check is omitted.
Computational Efficiency Page 20
Technical Deep Dive
NAND Gate
Negated Conjunction
The NAND gate combines an AND operation immediately followed by a NOT inversion. It produces a false result exclusively when all inputs are true.
In hardware schematics, it is drawn as the silhouette of an AND gate with an inversion bubble at the output line.
A B Q
Logic equation: Q = NOT (A AND B)
Advanced Architecture Page 21
Technical Deep Dive
NOR Gate
Negated Disjunction
The NOR gate inverts an OR operation. It outputs true exclusively when both incoming inputs are false.
If any input line is high, the output collapses immediately to zero.
A B Q
Logic equation: Q = NOT (A OR B)
Advanced Architecture Page 22
Universality Property
Silicon Microchip Design
Building Any System From a Single Gate
In electronic design, NAND and NOR are termed universal gates because any conceivable Boolean function can be implemented using exclusively one of these gate types.
This property dramatically reduces the manufacturing complexity and production cost of modern microprocessors.
2. Flash memory: Solid-state drives in smartphones and laptops use massive NAND flash arrays.
3. Reliability testing: Simplifies automated fault-checking across billions of transistors.
Semiconductor Engineering Page 23
Specialized Operations
XOR Gate
The Difference Detector
The XOR (Exclusive OR) gate outputs true if and exclusively if its inputs hold different truth values.
If both inputs match (both are false or both are true), the output drops to false. XOR is essential for binary half-adders inside arithmetic logic units (ALUs) and cryptographic hash functions.
A B Q
Equation: Q = (A AND NOT B) OR (NOT A AND B)
Cryptography & Arithmetic Page 24
Comparative Overview
Master Truth Table
A
B
AND
OR
NAND
NOR
XOR
0
0
0
0
1
1
0
0
1
0
1
1
0
1
1
0
0
1
1
0
1
1
1
1
1
0
0
0
Observe the complementary relationship between AND/NAND and between OR/NOR.
Reference Matrix Page 25
Logical Precedence
Evaluation Hierarchy
Standard Order of Operations
Just as multiplication precedes addition in algebra, Boolean operators follow a strictly defined evaluation hierarchy:
1. Parentheses: Resolved from the inside out.
2. NOT operator: Highest logical operator precedence.
3. AND operator: Equivalent to Boolean multiplication.
4. OR operator: Equivalent to Boolean addition.
Worked Demonstration
Expression: NOT true OR false AND true
Step 1 (NOT): (NOT true) evaluates to false.
Step 2 (AND): (false AND true) evaluates to false.
Step 3 (OR): false OR false evaluates to false.
Explicit parentheses eliminate ambiguity for maintenance teams.
Procedural Rigor Page 26
Worked Step-by-Step Example
Two-Factor Authentication (2FA)
Institutional Security Rule:
A user is granted access if they supply the correct password (P) AND at least one valid second factor: a text message code (S) OR an authenticator app token (A).
// Formal Boolean expression
access <-- P AND (S OR A)
Independent variables: P, S, A (total: 3 variables).
Total rows in table: 23 = 8 rows.
Resolution Strategy:
1. Form input columns for each variable (P, S, A).
2. Create an intermediate sub-expression column: (S OR A).
3. Apply the final AND operation with password P.
Guided Modeling Page 27
Solved Truth Table
Complete 8-Row Evaluation
P (Password)
S (SMS)
A (App)
S OR A
P AND (S OR A)
0
0
0
0
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
0
0
1
0
1
1
1
1
1
0
1
1
1
1
1
1
1
Notice how P = 0 immediately sets the output to 0, protecting the system regardless of secondary factors.
Systematic Verification Page 28
Student Practice Activity
Logical Modeling Challenge
Scenario: Smart Irrigation System
Design the Boolean expression for an automated sprinkler pump that activates (pump = true) if:
The soil is dry (S) AND it is NOT raining (NOT R) AND either (it is nighttime (N) OR manual override is pressed (M)).
Submission Requirements
1. Formulate the AP CSP pseudocode expression.
2. Draw the schematic gate diagram.
3. Calculate total required truth table rows (2n).
4. Submit your completed worksheet via Google Classroom.
Skill Demonstration Page 29
Solution Verification
Automated Irrigation Pump
Validated Logic Expression
pump <-- S AND (NOT R) AND (N OR M)
The negated factor NOT R guarantees that whenever it is raining (R = true), the entire condition drops to false, conserving vital water resources.
Executive Checklist
✓ 4 independent inputs: S, R, N, M.
✓ Truth table size: 24 = 16 rows.
✓ Gates required: 1 NOT, 1 OR, 2 AND.
✓ Explicit grouping prevents misinterpretation.
Accuracy Monitoring Page 30
Error Prevention
Expression Debugging
Confusing AND with OR
Common bug: Writing IF (x > 5 AND x < 3) trying to capture extreme values.
Underlying cause: No single real number can simultaneously exceed five and be less than three. The expression evaluates permanently to false. The correct operator is OR.
De Morgan’s Laws Oversights
Common bug: Assuming that NOT (A AND B) is equivalent to (NOT A) AND (NOT B).
Rigorous rule: Distributing negation flips the connective operator: NOT (A AND B) == (NOT A) OR (NOT B)
Software Quality Page 31
Design Decisions
Real-World Impact
Mission-Critical Safety
In medical life support or avionics, an incomplete truth table can lead to unhandled undefined states that endanger human life.
Energy Efficiency
Minimizing Boolean expressions reduces physical transistor counts on silicon dies, cutting heat dissipation and extending mobile battery life.
System Maintainability
Writing clear expressions with explicit parentheses and meaningful variable identifiers prevents regression bugs during large-scale refactoring.
Professional Connection Page 32
Essential Vocabulary
Part 1
Boolean expression
An expression in programming or logic that evaluates to one of exactly two possible outcomes: true or false.
Truth table
A systematic mathematical table used to display all possible combinations of inputs and their corresponding output states.
Logic gate
An elementary electronic component implementing a specific Boolean function by transforming physical electrical signals.
AP CSP Technical Glossary Page 33
Essential Vocabulary
Part 2
Universal gate
A logic gate (such as NAND or NOR) that can be combined exclusively with copies of itself to construct all other fundamental logical operations.
Short-circuit evaluation
A computational optimization where the execution stops evaluating sub-expressions as soon as the definitive final Boolean value is guaranteed.
Exclusive OR (XOR)
A logical operation that returns true when exactly one input is true, and false when both inputs are equal.
AP CSP Technical Glossary Page 34
Closing and Homework Assignment
Preparation & Metacognition
Reflective Homework Questions
1. In what ways do design choices about AND, OR, and NOT operations affect the reliability of a program that must decide whether a user is allowed to continue?
2. How might an incomplete or incorrect truth table lead to unexpected behavior in a digital system that processes multiple conditions?
3. Reflect on a digital tool you use regularly. How does its reliance on Boolean logic shape the way it responds to different user actions?
Metacognitive Evaluation
Which part of building a truth table felt most reliable for you today, and what strategy will you use next time to check your work?
Preparatory readings for next session:
• Differences Between Raster and Vector Graphics
• Raster vs. Vector Files: Key Differences and When to Use Them
Consolidation & Independent Practice Page 35
Guion sugerido: “Atención aquí para el examen AP: en una expresión AND, si el primer término resulta falso, el ordenador no pierde ciclos evaluando el segundo. Asimismo, destacamos que NAND y NOR son compuertas universales: con un único tipo de compuerta es posible fabricar memorias completas y procesadores enteros.”
Diapositivas 24 y 25: Operación XOR
Guion sugerido: “La compuerta XOR es un detector de disparidad: devuelve verdadero únicamente cuando las entradas son diferentes entre sí. Se usa en sumadores binarios de la CPU y en algoritmos criptográficos para encriptar información de extremo a extremo.”
Notas del orador: parte 2 Página 2
Colegio Preparatorio San Agustín | AP Computer Science Principles Guion instruccional
Guion de aplicación práctica, cierre y adaptaciones
Diapositivas 27 y 28: Modelado guiado de autenticación (2FA)
Guion sugerido: “Vamos a construir juntos la tabla del sistema 2FA. Tenemos tres variables independientes: contraseña P, mensaje S y app A. Eso nos da 2 elevado a la 3, es decir, 8 filas. Calculen primero la subexpresión entre paréntesis (S OR A), y luego apliquen la conjunción final con P.”
Diapositivas 29 a 32: Práctica independiente y decisiones de diseño
Guion sugerido: “Ahora trabajarán de forma individual en el sistema de riego automatizado. Recuerden que un diseño deficiente puede provocar desperdicio de agua o fallos catastróficos. Al finalizar, cada estudiante enviará su trabajo a través de Google Classroom.”
Pautas de apoyo neurodivergente para el docente
• TDAH y funciones ejecutivas: Presentar las columnas en orden fijo. Permitir el uso de la lista de verificación paso a paso.
• Dislexia y procesamiento visual: Utilizar contraste alto y espaciado amplio. Evitar textos condensados.
• TPS y TEA: Mantener un tono de voz pausado y predecible. Brindar opciones de uso de auriculares reductores de ruido.
Notas del orador: parte 3 Página 3
Slides 24 & 25: Exclusive OR (XOR) Operation
Verbatim script: “The XOR gate is a difference detector: it yields true only when the input operands differ from one another. It forms the computational heart of arithmetic adders inside the CPU arithmetic logic unit and end-to-end encryption algorithms.”
Teacher speaker notes: part 2 Page 2
Saint Augustine Preparatory School | AP Computer Science Principles Instructional Script
Application, Metacognition, and Neurodivergent Support
Slides 27 & 28: Guided 2FA Security System Modeling
Verbatim script: “Let us construct the 2FA security truth table together. With three independent variables—password P, SMS code S, and authenticator token A—we compute 2 cubed, or 8 rows. Always evaluate the parenthetical sub-expression (S OR A) first before combining with P.”
Slides 29 to 32: Independent Practice and Design Decisions
Verbatim script: “You will now work independently on the automated irrigation challenge. Keep in mind that flawed logic causes either wasted natural resources or failed crops. Once completed, submit your worksheet through Google Classroom.”
• Dyslexia & Visual Processing: Use clean sans-serif typefaces, generous white space, and no cramped tables.
• SPD & ASD: Maintain calm pacing and predictable classroom transitions. Support noise-reducing headphones.
Teacher speaker notes: part 3 Page 3
□ ¿Asocié correctamente la silueta de cada compuerta lógica con su símbolo esquemático?
Aplicación en ingeniería de software Página 2
Digital Systems Implementation Page 2
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Ejercicio 4: Caso del sistema de riego inteligente
Requisitos: Activar riego (riego = true) si el suelo está seco (S) Y NO está lloviendo (NOT L), Y además (es de noche (N) O se presiona el botón manual (M)).
a) Escriba la expresión en pseudocódigo AP CSP:
b) ¿Cuántas filas completas requeriría su tabla de verdad exhaustiva (2n)? Justifique:
Requirements: Turn on pump (pump = true) if soil is dry (S) AND it is NOT raining (NOT R), AND either (it is night (N) OR manual override is pressed (M)).
a) Write the formal AP CSP pseudocode statement:
b) How many complete rows would an exhaustive truth table require (2n)? Justify:
Digital submission: Google Classroom Page 2
Claves de corrección y rúbrica Página 2
Scoring Rubric (100 Points Total)
Truth table construction & accuracy (40 pts), logic gate recognition (20 pts), AP CSP pseudocode formulation (20 pts), daily quiz precision & MTV metacognition (20 pts).
