Unary Operator
The NOT operator acts upon a single input value and yields its exact inverse state.
When the incoming condition is true, the resulting output becomes false. When the input is false, the output becomes true.
Everyday analogy:
An alarm mute switch: if danger is detected (1), silencing the alert turns the bell off (0).
NOT gate schematic symbol
A NOT A
The small inversion bubble designates logical inversion.
Also formally referred to in circuit design as an inverter.
Exhaustive Mapping
Input A
Output (NOT A)
0 (False)
1 (True)
1 (True)
0 (False)
With one binary input variable, there are 2 to the power of 1 = 2 rows.
Hardware Applications
Enables alternating clock cycles to synchronize microprocessors with opposite signal phases.
Converts enable signals in chips where zero volts triggers the functional start of an operation.
Automatically raises an alert status when a safety heartbeat signal drops to zero.
The simplicity of an inverter guarantees minimal propagation delay across transistors.
Binary Operator
The AND operator inspects multiple conditions and demands that every single input evaluates to true.
If even one condition fails or evaluates to false, the entire compound evaluation instantly yields false.
Strict gatekeeping rule:
AND represents the most stringent approval criterion in computer science and algorithmic logic.
AND gate schematic symbol
A B A AND B
Flat input edge with a rounded curved output boundary.
Mathematical representation: A · B or written plainly as A AND B.
Real-World Analogy
For the smart entrance door to unlock, a person must present their physical keycard and enter the correct numeric passkey.
Valid keycard + Incorrect passkey
The door remains firmly locked (0).
Valid keycard + Correct passkey
The door unlocks immediately (1).
Both criteria are mandatory. Neither condition can substitute for the other.
Possibility Mapping
Input A
Input B
Output (A AND B)
0
0
0
0
1
0
1
0
0
1
1
1
With two inputs, there are 2 to the power of 2 = 4 total possibilities.
Circuit Properties
Holding any input firmly at 0 suppresses the output at 0, regardless of any signal changes taking place on other incoming lines.
A · 0 = 0
Holding an input at 1 allows the second signal to pass straight through completely unhindered and unaltered.
A · 1 = A
This behavior forms the backbone of digital bus enable switches.
Binary Operator
The OR operator checks incoming conditions and yields true if at least one input is true.
The outcome will be false if and only if each and every input condition is simultaneously false.
Inclusive nature:
If both inputs evaluate to true, the compound expression remains completely true.
OR gate schematic symbol
A B A OR B
Curved concave input face tapering to a pointed output.
Mathematical representation: A + B or written plainly as A OR B.
Real-World Analogy
To enter the garage, a resident may click the wireless remote or type the PIN code into the wall keypad.
Remote pressed + No keypad PIN
The garage door opens smoothly (1).
Both methods activated together
The garage door opens without conflict (1).
Access is blocked (0) only if neither method is employed.
Possibility Mapping
Input A
Input B
Output (A OR B)
0
0
0
0
1
1
1
0
1
1
1
1
Output is 1 whenever at least one 1 is present in the inputs.
Circuit Properties
Holding any input at 1 forcibly locks the output at 1, making any other input fluctuations irrelevant.
A + 1 = 1
Holding an input at 0 enables whatever signal travels along the opposite line to pass forward directly.
A + 0 = A
Essential for merging alarm alerts coming from different sensors.
Fundamentals Recap
NOT
Unary Inverter
Flips logic state. Converts truth to falsity and falsity to truth cleanly.
NOT 1 = 0
AND
Strict Conjunction
Requires total compliance. Evaluates to 1 when every input is 1.
1 AND 1 = 1
OR
Flexible Disjunction
Permits options. Evaluates to 1 if any input holds a value of 1.
0 OR 1 = 1
Now shifting into our deep dive: arithmetic circuits and advanced gate design.
Analytical Deep Dive
Unlike inclusive OR, the XOR operator produces true when exactly one input is true and the other is false, but not both.
It acts as a strict difference detector. Whenever two inputs match, the output drops to 0.
Design puzzle:
How can we add two binary bits (1 + 1) without exceeding a single-bit result slot?
XOR gate schematic symbol
A B A ⊕ B
Distinct secondary curved line across inputs.
Formal mathematical notation: A ⊕ B.
Analytical Deep Dive
Input A
Input B
Output (A XOR B)
0
0
0
0
1
1
1
0
1
1
1
0
Notice row four: when both inputs are 1, the XOR output yields 0.
Processor Architecture
The arithmetic addition of single bits directly matches the XOR output:
0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 0 (with carry)
The carry out to the next numeric column is created using a parallel AND gate:
Carry = A AND B
A fundamental mathematical operation resolved with two logic gates.
The Arithmetic Logic Unit (ALU) in every computer is rooted in this structure.
Hardware Universality
NAND is logically equivalent to an AND gate whose output passes directly into a NOT inverter.
It produces 0 only when all inputs are 1. In every other input scenario, it outputs 1.
Functional completeness principle:
Any digital computing circuit in existence can be constructed using only NAND gates.
NAND gate schematic symbol
A B NOT(A·B)
AND body with an inversion circle on the output.
Flash memory chips inside smartphones rely extensively on NAND gate structures.
Hardware Universality
Input A
Input B
A AND B
NAND Output
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
Intermediate column demonstrates the stage before final inversion occurs.
Hardware Universality
NOR represents an OR gate followed directly by a NOT inversion.
It outputs 1 only when every input is set to 0. If any input is 1, the output drops to 0.
Historical milestone:
The Apollo Guidance Computer which steered astronauts to the Moon was engineered entirely with integrated silicon NOR gates.
NOR gate schematic symbol
A B NOT(A+B)
Curved OR body with an inversion circle on the output.
NOR constitutes the second functionally complete gate family.
Analysis Strategy
Step 1
Identify every independent variable. With n variables, generate a truth table having exactly 2 to the power of n rows.
Step 2
Break down local negations and parenthesized sub-clauses into visual mini-steps to ease cognitive load.
Step 3
Apply the outermost operator connecting the sub-clauses and populate the final output column row by row.
A clear, methodical sequence prevents working memory overload.
Guided Walkthrough
Three input variables: A, B, and C produce 8 possible states.
Sub-expression 1
T1 = A AND B
True only when both A and B are 1.
Sub-expression 2
T2 = NOT C
Inverts the incoming value of C.
Main Operator
Output = T1 OR T2
True if either T1 or T2 is 1.
Segmenting into columns makes each stage straightforward to verify.
Software Engineering Design
Access to the secure computer laboratory is granted if the user holds a valid badge (B) and is a verified faculty member (F), or if the user has an active guest authorization permit (G).
Formal logical expression:
Access = (B AND F) OR G
What happens if an unverified student possesses a badge? B=1, F=0, G=0 yields Access=0.
Policy Verification
Badge (B)
Faculty (F)
Guest Permit (G)
B AND F
Access Granted
0
0
0
0
0
0
0
1
0
1
1
0
0
0
0
1
1
0
1
1
1
1
1
1
1
Truth tables validate every potential edge case prior to deploying software in production.
Software Implementation
Step 1: Input condition definition
We store student and user states with explicit Boolean values.
has_badge = True is_faculty = False has_guest_permit = True
Step 2: Logical rule evaluation
Python uses plain-language keywords and, or, and not.
access_granted = ( (has_badge and is_faculty) or has_guest_permit )
Grouping with parentheses prevents subtle operator precedence bugs.
Software Implementation
Step 3: Conditional control structure
The Boolean outcome governs the branching decision directly.
if access_granted: print(“Access granted to secure facility”) else: print(“Access denied”)
Step 4: Runtime execution analysis
The interpreter evaluates:
(True and False) or True
= False or True
= True
The system opens the entrance because the guest permit condition is fulfilled.
Optimization and Boolean Algebra
First Law
NOT (A AND B) = (NOT A) OR (NOT B)
The negation of a conjunction is equivalent to the disjunction of the individual negations.
Second Law
NOT (A OR B) = (NOT A) AND (NOT B)
The negation of a disjunction is equivalent to the conjunction of the individual negations.
Compilers utilize these transformation rules to trim transistor counts and increase execution speed.
Engineering Responsibility
Swapping an AND operator for an OR operator in firewall filter rules can inadvertently expose private servers to attackers.
In avionics or biomedical telemetry, a flawed logic branch could suppress a crucial life-support alert status.
Faulty compounding of eligibility requirements in civic welfare platforms can deny vital public services to qualifying citizens.
Logical accuracy is both a technical standard and an ethical obligation.
AP Computer Science Principles
Boolean Logic
A branch of algebra in which all values are reduced to either True or False, forming the foundation of digital computation.
Truth Table
A mathematical table used to determine whether a compound logical statement is true for all possible input combinations.
Logic Gate
An idealized or physical device implementing a Boolean function, performing a logical operation on one or more binary inputs.
Official technical terminology for exam readiness and computer science literacy.
AP Computer Science Principles
Universal Gate
A gate (such as NAND or NOR) that can implement any Boolean function without using any other type of gate.
Short-Circuit Evaluation
The semantics of Boolean operators in programming languages where the second argument is executed only if the first argument does not suffice.
Functional Completeness
The property of a set of logical connectives that can express all possible truth functions in modern computational systems.
Mastery of these concepts supports algorithm design and digital logic analysis.
Active Demonstration
The automatic braking unit in a smart car triggers if a front obstacle is detected (O=1) and current vehicle speed is above threshold (V=1), or if the manual emergency override is pressed (M=1).
Student tasks in notebook:
1. Formulate the Boolean expression representing the braking trigger.
2. Determine the physical logic gates necessary to wire this circuit.
3. Evaluate what happens when O=1, V=0, and M=0.
Discuss findings with a peer partner before writing the response in the guide.
Learning Consolidation
1. In what ways do design choices about AND, OR, and NOT affect system reliability?
2. How might an incomplete truth table produce unexpected behavior in multi-condition systems?
3. Reflect on a digital tool you use daily and how it relies on Boolean logic.
Self evaluation: Which part of building a truth table felt most reliable for you today, and what strategy will you use next time to check your work?
Preparatory reading for next session:
Differences between raster and vector graphics.
Saint Augustine Preparatory School Submit your completed practice worksheet via Google Classroom
Colegio Preparatorio San Agustín AP Computer Science Principles
Continuación de diapositivas 18 a 27
Texto de locución directa para el docente:
“Entramos ahora en el nivel de profundización analítica. El operador XOR, o disyunción exclusiva, resuelve una pregunta que desconcertó a los primeros ingenieros: ¿cómo logramos que una computadora sume números binarios? Cuando sumamos 1 más 1 en binario, el resultado aritmético es diez, es decir, cero en esa posición y uno de acarreo. Una compuerta OR estándar daría uno, lo cual crearía un desbordamiento erróneo.”
“La compuerta XOR genera un uno únicamente si las entradas son distintas entre sí. Si ambas son cero, produce cero; si ambas son uno, produce cero. Por ello, combinando una compuerta XOR para calcular la suma de los bits y una compuerta AND en paralelo para calcular el acarreo, construimos el circuito denominado semisumador binario (Half Adder). Esta es la célula fundamental de la Unidad Aritmético Lógica de todos los microprocesadores modernos.”
Texto de locución directa para el docente:
“En ingeniería de hardware existe un concepto fascinante denominado completitud funcional. Las compuertas NAND y NOR son conocidas como compuertas universales. Esto significa que una fábrica de microchips puede producir billones de copias de una misma compuerta NAND y, combinándolas adecuadamente entre sí, recrear inversores, compuertas AND, compuertas OR y memorias completas. La memoria de estado sólido de sus teléfonos inteligentes se fabrica con millones de estas estructuras interconectadas.”
Texto de locución directa para el docente:
“Al construir tablas de verdad para tres variables, siempre seguimos un método predecible: listamos las 8 combinaciones posibles, creamos columnas para los paréntesis intermedios y finalmente calculamos el resultado. Nunca intenten calcular el resultado final en la mente de forma directa. La separación por columnas reduce la sobrecarga mental y asegura que ningún caso imprevisto pase desapercibido.”
Unidad de Lógica Booleana | Página 2 de 3 Estrategias de mediación verbal directa
Colegio Preparatorio San Agustín AP Computer Science Principles
Continuación de diapositivas 28 a 35
Texto de locución directa para el docente:
“Observemos con atención el código en pantalla. En lugar de escribir una instrucción condicional incomprensible de cincuenta caracteres en una sola línea, la dividimos en cuatro pasos deliberados: primero declaramos las variables con nombres descriptivos; segundo, calculamos la expresión booleana y la guardamos en una variable de resultado; tercero, evaluamos esa variable dentro de la estructura condicional if; y cuarto, verificamos la traza de ejecución.”
Texto de locución directa para el docente:
“Augustus De Morgan descubrió que negar una conjunción equivale a negar individualmente los elementos y unirlos mediante una disyunción. Cuando decimos: ‘No es cierto que hace sol y llueve a la vez’, estamos afirmando lógicamente: ‘O no hace sol, o no llueve’. Estas equivalencias permiten a los compiladores simplificar circuitos físicos gigantescos, ahorrando energía en centros de datos.”
“Quiero recalcar la responsabilidad ética de este tema. Un error en un operador lógico dentro del software de un marcapasos o en el algoritmo de frenado de un avión no es un simple detalle cosmético: puede costar vidas humanas. Cada vez que construyen una tabla de verdad están verificando que su tecnología sea segura, equitativa y confiable.”
Texto de locución directa para el docente:
“Para concluir la sesión de hoy, revisen el vocabulario técnico en inglés en sus guías de trabajo. Completen los ejercicios prácticos de diseño de tablas y carguen su entrega terminada a través de Google Classroom. Recuerden responder las preguntas reflexivas y la autoevaluación metacognitiva.”
Unidad de Lógica Booleana | Página 3 de 3 Entrega de tareas vía Google Classroom
Saint Augustine Preparatory School AP Computer Science Principles
Continuing coverage for slides 18 through 27
Verbatim lecture script for the educator:
“We now step into our analytical deep dive. The XOR operator, or exclusive OR, solves a fundamental question that early computer architects wrestled with: how do we make electronic circuits add binary numbers? When we compute 1 plus 1 in binary, the numeric sum is two, represented in binary as one-zero: zero in the current column and a carry of one into the next. A standard OR gate produces one, which corrupts the math.”
“The XOR gate outputs 1 exclusively when its inputs are distinct from one another. If both are zero, it produces zero; if both are one, it produces zero. Therefore, by combining an XOR gate to evaluate the sum bit with a parallel AND gate to capture the carry bit, we assemble the half adder circuit. This circuit serves as the fundamental building block of the Arithmetic Logic Unit inside modern microprocessors.”
Verbatim lecture script for the educator:
“In computer hardware engineering, there is an extraordinary concept known as functional completeness. NAND and NOR gates are known as universal gates. This means a semiconductor fabrication plant can fabricate billions of copies of a single NAND circuit and, by wiring them in strategic configurations, recreate inverters, AND gates, OR gates, and complex registers. The solid-state flash memory in your mobile phone is composed of dense arrays of these exact gates.”
Verbatim lecture script for the educator:
“When evaluating a multi-variable truth table, always follow a structured sequence: list all 8 input combinations in standard counting order, designate dedicated columns for nested parentheses, and finally evaluate the primary gate. Never attempt to compute compound conditions entirely in your head. Externalizing intermediate states in visual columns preserves working memory and prevents logic errors.”
Boolean Logic Unit | Page 2 of 3 Direct instructional delivery notes
Saint Augustine Preparatory School AP Computer Science Principles
Continuing coverage for slides 28 through 35
Verbatim lecture script for the educator:
“Examine the code snippet presented on the screen. Rather than cramming a tangled conditional statement into a single convoluted line, we divide it into four clear steps: first, define variables with descriptive names; second, evaluate the Boolean expression into an explicit boolean variable; third, branch execution with a clean if statement; and fourth, trace execution through runtime output.”
Verbatim lecture script for the educator:
“Mathematician Augustus De Morgan proved that negating a conjunction is functionally equivalent to negating each operand and connecting them with a disjunction. When we declare: ‘It is not the case that it is both sunny and raining’, we mean logically: ‘Either it is not sunny, or it is not raining’. Compilers use these algebraic equivalences to eliminate redundant logic gates and dramatically accelerate instruction throughput.”
“Consider the profound ethical responsibility of this work. A swapped operator in an intensive care telemetry monitor or an aircraft fly-by-wire controller can result in catastrophic failure. When you construct and check a truth table, you are ensuring that your software behaves predictably, equitably, and safely under every conceivable circumstance.”
Verbatim lecture script for the educator:
“To conclude today’s session, review the English technical terms in your application guides. Complete the practice problems and submit your completed worksheet through Google Classroom. Make sure to complete the analytical homework questions and metacognitive check.”
Boolean Logic Unit | Page 3 of 3 Submit student worksheet via Google Classroom
c. Invierte la entrada recibida: _____________________
d. Produce 1 únicamente cuando las entradas son diferentes entre sí: _____________________
e. Produce 0 exclusivamente cuando todas las entradas valen 1: _____________________
Al concluir los ejercicios de esta guía y de tu hoja de trabajo, digitaliza tus respuestas o guarda tu archivo digital y súbelo a través de Google Classroom para recibir retroalimentación formativa.
Guía de Aplicación | Página 2 de 2 Cargar en Google Classroom
e. Yields 0 only when all inputs are 1: _____________________
Upon completing the exercises in this guide and in your practice worksheet, take a clear scan or save your document file and submit it via Google Classroom for formative feedback.
Student Application Guide | Page 2 of 2 Submit via Google Classroom
Escribe la expresión booleana y deduce el estado final si O=1, V=0 y B=0:
1. ¿De qué maneras las decisiones sobre AND, OR y NOT afectan la fiabilidad de un programa que decide si un usuario puede continuar?
2. ¿Cómo podría una tabla de verdad incompleta o incorrecta generar un comportamiento inesperado en un sistema digital?
3. Reflexiona sobre una herramienta digital que uses con regularidad. ¿De qué modo su dependencia de la lógica booleana da forma a la manera en que responde a distintas acciones del usuario?
Debes subir esta hoja de trabajo completamente resuelta a través de la plataforma Google Classroom en la tarea designada para la fecha de hoy, antes de la próxima clase.
Hoja de Trabajo Práctica | Página 2 de 2 Plataforma de entrega: Google Classroom
Formulate the Boolean expression and deduce output state when O=1, V=0, and M=0:
1. In what ways do design choices about AND, OR, and NOT operations affect the reliability of a program that must decide whether a user is allowed to continue?
2. How might an incomplete or incorrect truth table lead to unexpected behavior in a digital system that processes multiple conditions?
3. Reflect on a digital tool you use regularly. How does its reliance on Boolean logic shape the way it responds to different user actions?
You must submit this fully solved worksheet via Google Classroom under today’s assignment portal before our next class session.
Student Practice Worksheet | Page 2 of 2 Turn in through Google Classroom
3. Complejidades: ¿Qué relaciones o riesgos existen?
¿Qué sucedería si un programador confunde el operador OR con un operador AND? ¿Quiénes quedarían bloqueados injustamente?
Síntesis personal y toma de postura:
Conecta este análisis con la pregunta esencial sobre cómo las decisiones de diseño lógico afectan a los usuarios reales.
Rutina de Pensamiento Visible | Página 2 de 2 Guardar y adjuntar en Google Classroom
Connect your findings to our essential question regarding how Boolean design decisions affect human users.
Visible Thinking Routine | Page 2 of 2 Save and attach to Google Classroom
def evaluar_acceso(credencial: bool, docente: bool, permiso: bool) -> bool: “””Regla formal: (Credencial AND Docente) OR Permiso_Especial.””” sub_verificacion = puerta_and(credencial, docente) acceso_final = puerta_or(sub_verificacion, permiso) return acceso_final
Explicación paso a paso: Mostrar cómo la variable intermedia descompone la lógica para facilitar las pruebas unitarias y prevenir fallas.
def activar_freno(obstaculo: bool, exceso_vel: bool, manual: bool) -> bool: “””Regla de seguridad vehicular: (Obstáculo AND Velocidad) OR Manual.””” criterio_automatico = obstaculo and exceso_vel return criterio_automatico or manual
Código Fuente Docente | Página 2 de 3 Aplicación a sistemas ciberfísicos
Colegio Preparatorio San Agustín AP Computer Science Principles
Ejecución completa y sugerencias de mediación pedagógica
def verificar_de_morgan(): “””Comprueba que NOT (A AND B) == (NOT A) OR (NOT B) en todas las filas.””” estados = [(False, False), (False, True), (True, False), (True, True)] for a, b in estados: lado_izq = not (a and b) lado_der = (not a) or (not b) assert lado_izq == lado_der, ‘Fallo en equivalencia de De Morgan’ return True
=== SIMULADOR DE LÓGICA BOOLEANA AP CSP === [Semisumador] 1 + 1 -> Suma: 0, Acarreo: 1 (Binario: 10) [Control Acceso] C=1, D=0, P=1 -> Acceso: AUTORIZADO [Control Acceso] C=1, D=0, P=0 -> Acceso: DENEGADO [Frenado Emergencia] O=1, V=0, B=0 -> Freno: INACTIVO [Leyes De Morgan] Verificación completa: 4/4 combinaciones idénticas. ¡Todos los módulos lógicos operan con total fiabilidad!
• Para TDAH: Ejecuta el código bloque por bloque en un cuaderno interactivo o consola interactiva para retroalimentación visual inmediata.
• Para Dislexia: Utiliza fuentes monoespaciadas legibles y resalta con colores las variables para distinguir operadores de identificadores.
• Para TEA: Mantén la estructura predecible de entrada-proceso-salida en cada función sin cambios arbitrarios de nombres.
Código Fuente Docente | Página 3 de 3 Código validado y ejecutable
def evaluate_access(badge: bool, faculty: bool, permit: bool) -> bool: “””Formal rule: (Badge AND Faculty) OR Guest_Permit.””” sub_check = gate_and(badge, faculty) final_access = gate_or(sub_check, permit) return final_access
Step-by-step commentary: Storing intermediate conditions clarifies logic, streamlines unit testing, and prevents security bugs.
def trigger_brake(obstacle: bool, speed_limit: bool, manual: bool) -> bool: “””Safety rule: (Obstacle AND Speed) OR Manual_Override.””” auto_trigger = obstacle and speed_limit return auto_trigger or manual
Teacher Source Code | Page 2 of 3 Cyber-physical systems logic
Saint Augustine Preparatory School AP Computer Science Principles
Full execution output and neurodivergent classroom strategies
def verify_de_morgan(): “””Asserts NOT (A AND B) == (NOT A) OR (NOT B) across all states.””” states = [(False, False), (False, True), (True, False), (True, True)] for a, b in states: left_side = not (a and b) right_side = (not a) or (not b) assert left_side == right_side, ‘De Morgan equivalence mismatch’ return True
=== AP CSP BOOLEAN LOGIC SIMULATOR === [Half Adder] 1 + 1 -> Sum: 0, Carry: 1 (Binary: 10) [Access Control] B=1, F=0, G=1 -> Access: AUTHORIZED [Access Control] B=1, F=0, G=0 -> Access: DENIED [Emergency Brake] O=1, V=0, M=0 -> Brake: INACTIVE [De Morgan Laws] Algorithmic verification: 4/4 truth states confirmed. All Boolean logic systems operating with verified reliability!
• For ADHD: Run the code interactively segment by segment in a terminal or REPL for immediate visual feedback.
• For Dyslexia: Use clear monospaced syntax and color-code variables to visually differentiate operators from identifiers.
• For ASD: Maintain a predictable input-process-output pattern across all code examples without shifting conventions.
Teacher Source Code | Page 3 of 3 Executable verified code
