SYSTEM SCHEMATIC // CSE-101

SILICON BLUEPRINT

Exploring the Architecture & Inner Workings of the CPU

REV: 2026.06.01

STATUS: ACTIVE_

Student Name: ________________________

Date: ________________________

Class Period: ________________________

The Central Processing Unit (CPU)

The CPU is the "brain" of the computer. Yet, it doesn't think on its own; it simply executes basic commands sequentially at extreme speeds. This study guide tracks how a CPU uses RAM, registers, the Control Unit, and the ALU to fetch, decode, and execute instructions.

1. Anatomy of the Hardware Architecture

Control Unit (CU)

The manager of the CPU. It directs system traffic, handles electronic signals, and contains the Instruction Decoder to break down commands.

Arithmetic Logic Unit (ALU)

The math powerhouse of the computer. Performs all arithmetic (addition, subtraction) and logical decisions (AND, OR, comparing values).

Registers

Superfast, tiny memory spots located physically inside the CPU. They store active values immediately needed (e.g., the Accumulator / Register A).

Random Access Memory (RAM)

External storage organized into numbered addresses. Holds both the program instructions and the active data values currently being processed.

2. The Heartbeat: Fetch, Decode, Execute Cycle

The CPU operates on a continuous loop called the Instruction Cycle. Guided by the system clock, it completes this loop millions or billions of times per second (Hertz).

Step 1: FETCH PC → RAM

The CPU looks at the Program Counter (PC) to find the memory address of the next instruction. It requests that instruction from RAM and loads it into the Instruction Register (IR).

Step 2: DECODE INSTRUCTION DECODER

The Instruction Decoder translates the raw binary stored in the IR. It separates the instruction into an Opcode (what command to do, like ADD) and an Operand (where to find the data).

Step 3: EXECUTE CONTROL UNIT & ALU

The Control Unit coordinates the CPU components. It sends signals to move data, tells the ALU to execute calculation math, or saves outputs to Registers or RAM. Lastly, the Program Counter (PC) increments (+1) to prepare for the next fetch.

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3. The Basic Assembly Command Deck

A CPU reads instructions represented in binary code. In high-level architecture, we write these binary patterns using simple human-readable symbols called Mnemonic Assembly Instructions:

Instruction	Example Mnemonic	Under the Hood: Operation Description
LD (Load)	LD 14	Retrieves the value located in RAM Address 14 and copies it into Register A.
ADD (Add)	ADD 15	Sends the value inside Register A and the value from RAM Address 15 to the ALU. The sum is saved back into Register A.
ST (Store)	ST 14	Takes the value currently residing inside Register A and writes/copies it into RAM Address 14.
JMP (Jump)	JMP 0	Overwrites the Program Counter (PC). This forces the CPU to jump to Address 0, allowing loops.

4. Active Practice: Trace a CPU Program

Analyze the initial memory block below. Follow the three instructions step-by-step and calculate the changing values of Register A and the targeted RAM Addresses.

INITIAL MEMORY CONFIG

RAM Address 14: 5
RAM Address 15: 8
Register A: 0

*The Program Counter (PC) starts at Address 0.

Step 1

LD 14

What value is now in Register A?

Answer: _____

Step 2

ADD 15

What is the new value in Register A?

Answer: _____

Step 3

ST 14

What value is now inside RAM slot 14?

Answer: _____

5. Companion Video Reference & Conceptual Review

VIDEO RESOURCE REFERENCE

How a CPU Works

Watch the complete architectural walkthrough illustrating electronic clock gates, memory address parsing, and data busses.

URL REFERENCE: youtube.com/watch?v=q69_qmauwoQ

Critical Thinking Prompt:

Explain why a computer architecture requires both Registers (inside CPU) and RAM (outside CPU) if they both store data. Why can't we use only RAM?

Write your response here...

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